1. Field of the Invention
The present invention relates to a liquid crystal electro-optical (display) device, and particularly, to a liquid crystal electro-optical (display) device (referred to simply hereinafter as "LCD") comprising a thin film transistor formed on a glass substrate.
2. Description of the Related Art
Liquid crystal display devices are widely used as display devices of the so-called lap-top (notebook) type apparatus, i.e., portable type information processing apparatus. Recently, attempts are also made to use the LCD as a high resolution color display device for the so-called desktop type apparatus, i.e., the stand-alone type information processing apparatus.
In achieving such a high resolution color display with an LCD, the so-called active matrix-addressed (active matrix) liquid crystal display device which drives each of the pixels by the individually provided thin film transistor (referred to simply hereinafter as a "TFT") is used. By employing the active-matrix type driving method, excellent display characteristics can be achieved by eliminating problematic cross talks which occur among the pixels in the simple matrix method. In the active-matrix type driving method, the TFTs are provided on one of the glass substrates constituting the liquid crystal panel so that each of the TFTs may control the applied voltage of the corresponding transparent pixel electrode.
In the LCD driven by the active matrix method, TFTs are formed on amorphous glass substrate. Accordingly, differing from an ordinary transistor formed on a single crystal Si substrate, an amorphous silicon or a polycrystalline silicon, i.e., a so-called polysilicon, is used for the active portion of channel layer and the like of the TFT. Although polysilicon is more favorable for a TFT than amorphous silicon because the mobility of carriers is higher for the former as compared with that for the latter, it contains structural defects such as grain boundaries at a density substantially higher than single crystal silicon. As a result, polysilicon TFTs tend to suffer high leak current.
To minimize the leak current, many TFTs for LCDs employ the so-called LDD (Lightly Doped Drain) structure. By utilizing the LDD structure, the concentration of impurities in the drain region can be slightly lowered at the portion neighboring the channel region, and by then applying an electric field to such a portion of lowered impurity concentration, the focusing of electric field to the channel region is relaxed.
FIGS. 10A to 10C are diagrams showing the process steps for fabricating a conventional polysilicon TFT.
Referring to FIG. 10A, polysilicon patterns 11A and 11B are formed on a glass substrate 10 in correspondence with an n-channel transistor and a p-channel transistor, and gate patterns 13A and 13B are formed on the polysilicon patterns 11A and 11B with gate oxide films 12A and 12B interposed respectively therebetween. In the step with reference to FIG. 10A, the region for forming a p-channel transistor Tr.sub.2 is protected by a resist 14B, and P.sup.+ ions are implanted by using the gate electrode 13A as the mask. As a result, a channel region 11c corresponding to the gate electrode 13A sections the polysilicon pattern 11A so as to provide n-type regions 11a and 11b to form the source and drain regions of an n-channel transistor Tr.sub.1.
Then referring to FIG. 10B, the resist 14B is removed, and another resist 14A is deposited in such a manner to cover the n-channel transistor Tr.sub.1 formed in the step with reference to FIG. 10A. Then, B.sup.+ ions are implanted into the resulting structure by using the gate electrode 13B as the mask. Thus, sectioned by a channel region lid just below the gate electrode 13B, p-type regions 11e and 11f are formed in the polysilicon pattern 11B.
After stripping off the resist 14A, heat treatment is applied to form a circuit comprising an n-channel transistor Tr.sub.1 and a p-channel transistor Tr.sub.2 on the glass substrate 10.
Conventionally, in case of forming the aforementioned LDD structure in an n-channel or a p-channel transistor above, for instance, a process with reference to FIG. 11A has been conventionally employed. More specifically, referring to FIG. 11A, an oxide film 15 is deposited on a previously formed transistor Tr.sub.1, and anisotropic etching is applied from the upper side by means of RIE to form oxide films 15a and 15b on the side walls of the gate electrode as is shown in FIG. 11B. Then, by further implanting ions using the gate electrode having thereon the oxide films as a mask to form the heavily doped regions 11a and 11b, LDD regions 11a' and 11b' can be formed between the channel region and the region 11 and between the channel region and the region 11b. The same process is conducted for the p-channel transistor Tr.sub.2. I n the conventional process for fabricating a TFT as described above with reference to FIGS. 10A and 10B, however, mask process must be performed twice. Moreover, the problem is that the mask used for implanting P.sup.+ ions in the process of FIG. 10A cannot be removed easily. Although ashing for a considerably long duration of time is necessary to remove the resist, such a treatment may impose negative effects on the characteristics of the TFT formed on the glass substrate by a low temperature fabrication.
Furthermore, in case of forming an LDD structure on the TFT, it is necessary to perform a process comprising depositing an oxide film 15, and after performing anisotropic etching by means of RIE, implanting ions using the resulting side wall oxide films 15a and 15b as masks. Such a complicated process has been found problematic. It is possible to form an LDD structure using other masks instead of the side wall oxide films, but at the expense of incorporating an additional mask process.